With the development of the semiconductor technology, the number of transistors integrated on a chip keeps increasing. Consequently, the computation and memory capacity of graphics processing units improve rapidly. So far, the floatingpoint computing capacity of GPUs has greatly exceeded that of CPUs, and the potential of GPUs in the nongraphic computing field, especially in high performance computing, has attracted more and more researchers’ attention. This paper gives an introduction to the principles of the general purpose computation on GPUs and the latest research results about architecture and the programming model of GPGPU from both the research community and industry.
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半导体工艺的发展使得芯片上集成的晶体管数目不断增加,图形处理器的存储和计算能力也越来越强大.目前,GPU的峰值运算能力已经远远超出主流的CPU,它在非图形计算领域,特别是高性能计算领域的潜力已经引起越来越多研究者的关注.本文介绍了GPU用于通用计算的原理以及目前学 术界和产业界关于GPGPU体系结构和编程模型方面的最新研究成果.
为了解决传统PCBIOS的局限性及其面临的问题,Intel公司提出了可扩展固件接口(EFI)的规范标准。作为下一代BIOS,EFI为启动操作系统前的程序提供了一个标准环境。文中详细介绍了EFI,指出EFI存在的一些安全问题,并分析相关的安全机制,指出了实现EFI安全必须考虑的因素。
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EFI及其安全性研究
介绍了DSP的电源设计方案,并对电源芯片TPS70351的特点和应用进行了论述。
电源设计,TP70351, 芯片散热
Typical Design of DSP Power
It has introduced the power design of DSP, and has expended the facts to the characteristic and using of TPS70351 of chip of Power.
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DSP电源的典型设计
DSP电源的典型设计
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EFI-Tiano环境下的AES算法应用模型
AES(Advanced Encryption Standard)算法是现代密码学中最重要的加密算法之一。尽管AES算法本身的理论早已被广泛流传,但AES算法在特定平台下如何高效地实现还有待于 更进一步的研究和发现。讨论了一种在EFI/Tiano环境下的新型AES算法应用模型,并利用IA-32平台的新特性对模型进行了改进,实验证明此模型 比传统软件实现的算法模型更高效稳定。
A novel design is presented to defend against electromagnetic interference (EMI) in a high speed data acquisition system. Problems that affect signal integrity (SI) in high speed image acquisition systems, such as reflection, crosstalk and ground bounce, are deeply analyzed in a manner consistent with transmission line theory. The results can theoretically inform EMI design of important networks, including system power, ground, clocks, high speed wires and decoupling capacitors. Experiments simulating print circuit board(PCB) reflection and EMI on high speed signal wires between DM642 and SDRAM are conducted. The power and ground should be placed separately in different layers. The clock lines passing through holes should be as few as possible. The signal lines should be as close to the same length as possible. The results show that amplitude of the signal overshoot is less than 0.7 V and the EMI amplitude is within the federal communications commission(FCC) standard.
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DM642高速图像采集系统的电磁干扰设计
针对高速数据采集电路中的电磁干扰问题,提出一种有效的抗干扰设计方案。利用信号传输线理论,对高速图像采集系统中影响信号完整性的反射、串扰和地弹等问题进行了理论分析,对系统电源、地、时钟、高速信号线等重点网络的电磁干扰设计进行理论指导和设计,并且对DM642与SDRAM间的高速信号线进行PCB(print circuit board)的反射、电磁干扰等仿真分析。设计中电源和地独立分层布线,尽量减少时钟线过孔,信号布线尽量等长。结果显示系统信号传输的过冲幅度小于0.7V,电磁干扰强度在FCC标准控制范围之内。
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